[Oral Presentation]A Nonzero Vector PWM Method to Reduce Common-Mode Voltage

A Nonzero Vector PWM Method to Reduce Common-Mode Voltage

ID：6 Submission ID：1736 View Protection：ATTENDEE Updated Time：2020-10-28 09:32:34 Hits：287 Oral Presentation

Start Time：2020-11-02 11:30 （Asia/Shanghai）

Duration：15min

Session：[C] Electric Machine Design and Control » [C2] Session 22 and Session 27

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Abstract

The common-mode voltage in three-phase inverter may harm the motor drive system. If only non-zero space vector is used, it can be suppressed by appropriate Space Vector Pulse Width Modulation (SVPWM) method. In this paper, a Nonzero Vector Pulse Width Modulation (NZPWM) technique is proposed to suppress common-mode voltage for three-phase inverter. In sectors I, III and V, instead of the real zero voltage vectors, two opposite voltage vectors near to the active voltage vectors are utilized. In sectors II, IV and VI, the first active voltage vector and the voltage vector opposite to the first active voltage vector are utilized. Therefore, the amplitude of common-mode voltage can be reduced to one sixth of DC bus voltage. Simulation and experimental results show that the proposed NZPWM is effective for common-mode voltage suppression.

Keywords

common-mode voltage;NZPWM;three-phase inverter